System Model

For this example develop a position control system for a DC motor. A single-loop angular velocity controller is designed in波德图设计. To design an angular position controller, add an outer loop that contains an integrator.

Define a state-space plant model, as described inSISO Example: The DC Motor.

% Define the motor parametersL R = 2.0 = 0.5公里= .015 Kb = .015 Kf = 0.2 J = 0.02% Create the state-space modelA = [-R/L -Kb/L; Km/J -Kf/J] B = [1/L; 0]; C = [0 1]; D = [0]; sys_dc = ss(A,B,C,D);

Design Objectives

The design objective is to minimize the closed-loop step response settling time, while maintaining an inner-loop phase margin of at least 65 degrees with maximum bandwidth:

Match System To Control Architecture

Control System Designerhas six possible control architectures from which you can choose. For more information on these architectures, seeFeedback Control Architectures.

For this example use Configuration 4, which has an inner and outer control loop.

Currently, the control system structure does not match Configuration 4. However, using block diagram algebra, you can modify the system model by adding:

At the MATLAB^®command line, add the integrator to the motor plant model.

plant = sys_dc*tf(1,[1,0]);

Create an initial model of the inner-loop compensator that contains the feedback differentiator.

Cdiff = tf('s');

Define Control Architecture

OpenControl System Designer.

controlSystemDesigner

InControl System Designer, on theControl Systemtab, clickEdit Architecture.

In the Edit Architecture dialog box, underSelect Control Architecture, click the fourth architecture.

Import the plant and controller models from the MATLAB workspace.

In theBlockstab, for:

ClickOK.

The app updates the control architecture and imports the specified models for the motor plant and the inner-loop controller.

InControl System Designer, the following plots open:

For this example, close theBode Editor for LoopTransfer_C1andRoot Locus Editor for LoopTransfer_C2plots.

Since the inner loop is tuned first, configure the plots to view just the inner-loop Bode editor plot. On theViewtab, clickSingle, and clickBode Editor for LoopTransfer_C2.

Isolate Inner Loop

To isolate the inner loop from the rest of the control system architecture, add a loop opening to the open-loop response of the inner loop. In theData Browser, right-clickLoopTransfer_C2, and selectOpen Selection.

To add a loop opening at the output of outer-loop compensator,C1, in the Open-Loop Transfer Function dialog box, clickAdd loop opening location to list. Then, selectuC1.

ClickOK.

The app adds a loop opening at the selected location. This opening removes the effect of the outer control loop on the open-loop transfer function of the inner loop.

TheBode Editorresponse plot updates to reflect the new open-loop transfer function.

Tune Inner Loop

To increase the bandwidth of the inner loop, increase the gain of compensatorC2.

In theBode Editorplot, drag the magnitude response upward until the phase margin is 65 degrees. This corresponds to a compensator gain of107. Increasing the gain further reduces the phase margin below 65 degrees.

Alternatively, you can adjust the gain value using the compensator editor. For more information, seeEdit Compensator Dynamics.

Tune Outer Loop

With the inner loop tuned, you can now tune the outer loop to reduce the closed-loop settling time.

InControl System Designer, on theViewtab, selectLeft/Right. Arrange the plots to display theRoot Locus for LoopTransfer_C1andIOTransfer_r2y_stepplots simultaneously.

To view the current settling time, right-click in the step response plot and selectCharacteristics>Settling Time.

The current closed-loop settling time is greater than 500 seconds.

In theRoot Locus Editor, increase the gain of compensatorC1. As the gain increases, the complex pole pair moves toward a slower time constant and the real pole moves toward a faster time constant. A gain of600produces a good compromise between rise time and settling time.

With a closed-loop settling time below 0.8 seconds and an inner-loop phase margin of 65 degrees, the design satisfies the design requirements.