Signal Integrity Toolbox
Simulate and analyze high-speed serial and parallel links
Signal Integrity Toolbox™ provides functions and apps for designing high-speed serial and parallel links. You can generate experiments covering multiple parameters, extract design metrics, and visualize waveforms and results. You can predict operating margins and link performance by analyzing transmitter, receiver, and channel interactions.
The toolbox supports standard-compliant IBIS-AMI models for statistical and time-domain simulation to analyze equalization and clock recovery. You can describe the channel using multiport S-parameter data, IBIS, HSPICE, and analytical models.
信号完整性的工具箱允许您分析波形s and eye diagrams and measure channel quality while observing effects such as ISI, jitter, and noise. You can analyze the channel in the frequency domain for insertion loss, return loss, and crosstalk, and verify compliance with industry standards including IEEE®802.3, OIF, PCIe, and DDR.
Before layout, you can evaluate tradeoffs and optimize parallel and serial links for cost, performance, reliability, and compliance. You can then perform post-layout verification of the system and correlate simulation results with measurement data.
Serial Link Analysis
Use the Serial Link Designer app for end-to-end, pre-layout analysis of multi-gigabit serial links. Use IBIS-AMI models, PCB traces, vias, and connectors to analyze loss, reflections, crosstalk, and more.
Parallel Link Analysis
Use the Parallel Link Designer app to determine setup and hold timing as well as voltage margins for high-speed parallel links. Analyze parallel interfaces for compliance with timing and signal integrity constraints.
Standards Compliance
Check serial and parallel links for compliance with industry standards by using one of over 40 available compliance kits for PCIe, DDR, USB, Ethernet, and other standards.
Design Space Exploration
Perform design of experiments by sweeping parameters and channels. UseParallel Computing Toolbox™to speed up large-scale analyses.
IBIS-AMI Models for Simulations
Simplify your workflow by using the Signal Integrity Link to build and import IBIS-AMI models directly fromSerDes Toolbox™。或者,使用IBIS-AMI models provided by third-party IC companies to analyze serial and parallel link performance.
Post-Layout Verification
WithRF PCB Toolbox™, create workflows to import PCB schematics for post-layout signal integrity verification.
Waveform Visualization
Use the Signal Integrity Viewer app to create waveforms and comparison plots from S-parameters and HSPICE models.
