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Cascade Filters

Supported Cascade Filter Types

The coder supports code generation for a multirate cascade of filter objects (dsp.FilterCascade).

Generating Cascade Filter Code

Instantiate the filter stages and cascade them in the MATLAB®workspace.

hm1 = dsp.FIRDecimator('DecimationFactor',12); hm2 = dsp.FIRDecimator('DecimationFactor',4); my_cascade = dsp.FilterCascade(hm1,hm2);
使用的细节,请参阅dsp.FilterCascadein the DSP System Toolbox™ documentation.

The coder currently imposes certain limitations on the filter types allowed in a cascade filter. SeeLimitations for Code Generation with Cascade Filtersbefore creating your filter stages and cascade filter object.

Generating Cascade Filter Code with thefdhdltoolFunction

Callfdhdltoolto open the Generate HDL dialog box, passing in the cascade filter System object™ and the fixed-point input data type.

fdhdltool(my_cascade,numerictype(1,16,15))
Set the desired code generation properties and click theGeneratebutton to generate code.

Generating Cascade Filter Code with thegeneratehdlFunction

Callgeneratehdlto generate HDL code for your filter, passing in the cascade filter System object, the fixed-point input data type, and code generation properties as desired.

generatehdl(my_cascade,'InputDataType',numerictype(1,16,15),...'Name','MyFilter','TargetLanguage','Verilog',...“GenerateHDLTestbench”,'on')

Limitations for Code Generation with Cascade Filters

The following rules and limitations apply to cascade filters when used for code generation:

  • You can generate code for cascades that combine the following filter types:

    • Decimators and/or single-rate filter structures

    • Interpolators and/or single-rate filter structures

    Code generation for cascades that include both decimators and interpolators is not supported. If unsupported filter structures or combinations of filter structures are included in the cascade, code generation returns an error.

  • 对于代码生成,只有一个flat (single-level) cascade structure is allowed. Nesting of cascade filters is disallowed.

  • By default, generated HDL code excludes the input and output registers from the stages of the cascade, except for:

    • The input of the first stage and the output of the final stage.

    • The input registers of interpolator stages.

    To generate output registers for each stage, select theAdd pipeline registersoption in the Generate HDL dialog box. When using this option, internal pipeline registers might also be added, depending on the filter structures.

  • When a cascade filter is passed tofdhdltool,FIR adder styleoption is disabled. If you require tree adders for FIR filters in a cascade, select theAdd pipeline registersoption (since pipelines require tree style FIR adders).

  • The coder generates separate HDL code files for each stage of the cascade, in addition to the top-level code for the cascade filter itself. The filter stage code files are identified by appending the character vector'_stage1','_stage2',……'_stageN'to the filter name.

The figure shows the default settings of the Generate HDL dialog box options for a cascade filter design.