Main Content

Microsemi FPGA Board Support fromHDL Verifier

HDL Verifier™ automates the verification of HDL code on FPGA boards by providing connections between your FPGA board and your simulations in Simulink®or MATLAB®.

FPGA-in-the-loop (FIL) enables you to run a Simulink or MATLAB simulation that is synchronized with an HDL design running on an FPGA board.

To use FPGA-in-the-loop, you must have a supported FPGA board connected to your MATLAB host computer using a supported connection type, and a supported synthesis tool.

Note

TheHDL Verifier Support Package for Microsemi®FPGA Boardsdoes not support board customization.

Supported Microsemi FPGA Boards

This support package enables FPGA-in-the-loop simulation for the boards in the table.

Device Family Board Ethernet JTAG PCI Express Comments

Microsemi SmartFusion®2

Microsemi SmartFusion2 SoC FPGA Advanced Development Kit

 X SeeInstalling Microsemi SmartFusion2 SoC FPGA Advanced Development Kit

Microsemi Polarfire®

Microsemi Polarfire Evaluation Kit

 X SeeInstalling Microsemi Polarfire Evaluation Kit

Microsemi RTG4®

RTG4-DEV-KIT

 X

InstallingMicrosemiSmartFusion2 SoC FPGA Advanced Development Kit

The Microsemi SmartFusion2 SoC FPGA Advanced Development Kit requires a special setup. Follow the following steps to ensure proper connection:

  1. Board setup

    To ensure functionality, connect the board and set it up as follows:

    1. Connect the USB cable to the USB-UART terminal on the board.

    2. Connect the power cable to the power supply input (12V DC).

    3. Plug the RJ45 cable into RJ45-Port0.

  2. Program the FPGA

    Follow the steps using theFPGA-in-the-Loop Wizardto program the FPGA.

InstallingMicrosemiPolarfire评估工具

The Microsemi Polarfire Evaluation Kit requires a special setup. Follow the following steps to ensure proper connection:

  1. Board setup

    To ensure functionality, connect the board and set it up as follows:

    1. Connect the USB cable to the J5 connector on the board.

    2. Connect the power cable to the J9 jack on the board (12V DC , 5A).

    3. Plug the RJ45 cable into RJ45-Port0 (J15 connector).

    4. Set the jumpers on the board as follows:

      J28 – closed

      J27 – closed

      J227 – closed

      J26 – closed

      J20 – 2-3 closed

      J21 – 2-3 closed

      J22 – 2-3 closed

      J18 – 2-3 closed

      J19- 2-3 closed

      J23 – open

  2. Program the FPGA

    Follow the steps using theFPGA-in-the-Loop Wizardto program the FPGA.

  3. Power Cycle

    Once the FPGA programming file is loaded, turn off the FPGA power, and then back on before simulating.